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NXP Semiconductors /MIMXRT1011 /PIT /TIMER[2] /TCTRL

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Interpret as TCTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TEN_0)TEN 0 (TIE_0)TIE 0 (CHN_0)CHN

TEN=TEN_0, TIE=TIE_0, CHN=CHN_0

Description

Timer Control Register

Fields

TEN

Timer Enable

0 (TEN_0): Timer n is disabled.

1 (TEN_1): Timer n is enabled.
TIE

Timer Interrupt Enable

0 (TIE_0): Interrupt requests from Timer n are disabled.

1 (TIE_1): Interrupt is requested whenever TIF is set.
CHN

Chain Mode

0 (CHN_0): Timer is not chained.

1 (CHN_1): Timer is chained to a previous timer. For example, for channel 2, if this field is set, Timer 2 is chained to Timer 1.

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data